From 7d6bc60db9427f029f990002870e40541601a209 Mon Sep 17 00:00:00 2001 From: Sumeet R Pawnikar Date: Fri, 8 May 2020 19:22:07 +0530 Subject: tigerlake: enable DPTF functionality for volteer Enable DPTF functionality for volteer platform BRANCH=None BUG=b:149722146 TEST=Built and tested on volteer system Change-Id: I385fb409ccd291d97369295ff99f21c9430880f9 Signed-off-by: Sumeet R Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/41427 Reviewed-by: Wonkyu Kim Reviewed-by: Caveh Jalali Tested-by: build bot (Jenkins) --- src/soc/intel/tigerlake/fsp_params.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/tigerlake') diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index cf106cbe16..0c67105300 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -193,6 +193,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchPwrOptEnable = !(config->DmiPwrOptimizeDisable); params->SataPwrOptEnable = !(config->SataPwrOptimizeDisable); + /* Enable TCPU for processor thermal control */ + params->Device4Enable = config->Device4Enable; + /* LAN */ dev = pcidev_path_on_root(PCH_DEVFN_GBE); if (!dev) -- cgit v1.2.3