From 73451fdea266e24a3ce99e1bf41f49735dc62d28 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 6 Jan 2020 19:00:31 +0200 Subject: sb/intel/common: Add smbus_set_slave_addr() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I7dddb61fab00e0f4f67d4eebee0cfe8dcd99f4ab Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/38230 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/tigerlake/include/soc/smbus.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/intel/tigerlake/include') diff --git a/src/soc/intel/tigerlake/include/soc/smbus.h b/src/soc/intel/tigerlake/include/soc/smbus.h index 9226fba4e1..50ea044e53 100644 --- a/src/soc/intel/tigerlake/include/soc/smbus.h +++ b/src/soc/intel/tigerlake/include/soc/smbus.h @@ -23,8 +23,6 @@ #define _SOC_TIGERLAKE_SMBUS_H_ /* IO and MMIO registers under primary BAR */ -/* Set address for PCH as SMBus slave role */ -#define SMB_RCV_SLVA 0x09 /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */ #define TCO1_STS 0x04 -- cgit v1.2.3