From b622d4b27b0ebff33cab63ff1ea52c285d68e028 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 26 May 2020 18:33:22 +0530 Subject: soc/intel/tigerlake: Select PLATFORM_USES_FSP2_2 This patch performs below operations 1. Add support for FSP 2.2 2. Set EnableMultiPhaseSiliconInit to ensure bootloader can call FspMultiPhaseSiInit() API. 3. Provide placeholder to perform require chipset programming (example TCSS) before calling FspMultiPhaseSiInit() API. Change-Id: I15252d2db3f8e75d430b84e86cc5141225a3f981 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/41729 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Srinidhi N Kaushik Reviewed-by: Wonkyu Kim --- src/soc/intel/tigerlake/fsp_params.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'src/soc/intel/tigerlake/fsp_params.c') diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 798c16a425..cf24021841 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -327,9 +327,29 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) } + /* EnableMultiPhaseSiliconInit for running MultiPhaseSiInit */ + params->EnableMultiPhaseSiliconInit = 1; mainboard_silicon_init_params(params); } +/* + * Callbacks for SoC/Mainboard specific overrides for FspMultiPhaseSiInit + * This platform supports below MultiPhaseSIInit Phase(s): + * Phase | FSP return point | Purpose + * ------- + ------------------------------------------------ + ------------------------------- + * 1 | After TCSS initialization completed | for TCSS specific init + */ +void platform_fsp_multi_phase_init_cb(uint32_t phase_index) +{ + switch (phase_index) { + case 1: + /* TCSS specific initialization here */ + break; + default: + break; + } +} + /* Mainboard GPIO Configuration */ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params) { -- cgit v1.2.3