From b30fe36734df3c48ec35438052ee8b28bf7a6a44 Mon Sep 17 00:00:00 2001 From: Srinidhi N Kaushik Date: Wed, 20 May 2020 11:55:36 -0700 Subject: soc/intel/tigerlake: Remove MIPI clock setting from devicetree In Tiger Lake we have support for enabling MIPI clocks at runtime in ACPI. Hence remove setting pch_islclk from devcietree and chip.h. Also update functions which reference pch_isclk. BUG=b:148884060 Branch=None Test=build and boot volteer and verify camera functionality Signed-off-by: Srinidhi N Kaushik Change-Id: I6b3399172c43b4afa4267873ddd8ccf8d417ca16 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41570 Reviewed-by: Furquan Shaikh Reviewed-by: Wonkyu Kim Tested-by: build bot (Jenkins) --- src/soc/intel/tigerlake/finalize.c | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'src/soc/intel/tigerlake/finalize.c') diff --git a/src/soc/intel/tigerlake/finalize.c b/src/soc/intel/tigerlake/finalize.c index 7de64a3a50..a402625799 100644 --- a/src/soc/intel/tigerlake/finalize.c +++ b/src/soc/intel/tigerlake/finalize.c @@ -27,24 +27,6 @@ #include #include -#define CAMERA1_CLK 0x8000 /* Camera 1 Clock */ -#define CAMERA2_CLK 0x8080 /* Camera 2 Clock */ -#define CAM_CLK_EN (1 << 1) -#define MIPI_CLK (1 << 0) -#define HDPLL_CLK (0 << 0) - -static void pch_enable_isclk(void) -{ - pcr_or32(PID_ISCLK, CAMERA1_CLK, CAM_CLK_EN | MIPI_CLK); - pcr_or32(PID_ISCLK, CAMERA2_CLK, CAM_CLK_EN | MIPI_CLK); -} - -static void pch_handle_sideband(config_t *config) -{ - if (config->pch_isclk) - pch_enable_isclk(); -} - static void pch_finalize(void) { uint32_t reg32; @@ -83,8 +65,6 @@ static void pch_finalize(void) write32(pmcbase + CPPMVRIC, reg32); } - pch_handle_sideband(config); - pmc_clear_pmcon_sts(); } -- cgit v1.2.3