From 23e8b5b4949063319c339120f13e392a90493b58 Mon Sep 17 00:00:00 2001 From: John Zhao Date: Wed, 27 May 2020 23:11:19 -0700 Subject: soc/intel/tigerlake: Configure TcssDma0En and TcssDma1En Determine the TcssDma0 and TcssDma1 enabling based on TBT DMA controllers setting. BUG=:b:146624360 TEST=Booted on Volteer and verified TcssDma0 and TcssDma1 enabling. lspci shows TcssDma0(0d.2) and TcssDma1(0d.3). Signed-off-by: John Zhao Change-Id: I61ac4131481374e9a2a34d1a30f822046c3897fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/41812 Reviewed-by: Wonkyu Kim Reviewed-by: Duncan Laurie Tested-by: build bot (Jenkins) --- src/soc/intel/tigerlake/chip.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/soc/intel/tigerlake/chip.h') diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 5892829ef4..ed09aaa936 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -216,10 +216,6 @@ struct soc_intel_tigerlake_config { uint8_t TcssXhciEn; uint8_t TcssXdciEn; - /* TCSS DMA */ - uint8_t TcssDma0En; - uint8_t TcssDma1En; - /* * IOM Port Config * If a port orientation needs to be controlled by the SOC this setting must be -- cgit v1.2.3