From 03a05b47e06392e028dbdb73900219d45084b2fd Mon Sep 17 00:00:00 2001 From: Venkata Krishna Nimmagadda Date: Wed, 27 May 2020 14:20:21 -0700 Subject: soc/intel/tigerlake/acpi: Update camera_clock_ctl.asl to ASL2.0 This change updates camera_clock_ctl.asl to use ASL2.0 syntax. This increases the readability of the ASL code. BUG=none BRANCH=none TEST="BUILD for volteer" Signed-off-by: Venkata Krishna Nimmagadda Change-Id: I6370e4b268331bfba5bc0392f27c560836b6ea72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41798 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie Reviewed-by: Subrata Banik --- src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/soc/intel/tigerlake/acpi') diff --git a/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl b/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl index 3d31502526..f9f48bf04a 100644 --- a/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl +++ b/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl @@ -11,8 +11,7 @@ Scope (\_SB.PCI0) { /* IsCLK PCH base register for clock settings */ Name (ICKB, 0) - Store (PCRB (PID_ISCLK) + R_ICLK_PCR_CAMERA1, ICKB) - + ICKB = PCRB (PID_ISCLK) + R_ICLK_PCR_CAMERA1 /* * Arg0 : Clock Number * Return : Offset of register to control the clock in Arg0 -- cgit v1.2.3