From f796c6e0ec6769873d63b6fcfc64c0ac14ba3555 Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Fri, 18 Nov 2016 14:57:51 -0800 Subject: driver/intel/fsp2_0: Add version parameter to FSP platform callback Change-Id: Ibad1ad6bb9eedf2805981623e835db071d54c528 Signed-off-by: Andrey Petrov Reviewed-on: https://review.coreboot.org/17497 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/romstage/romstage_fsp20.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/skylake') diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 8e083234a0..adb84423ac 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -132,7 +132,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg) m_cfg->PcieRpEnableMask = mask; } -void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd) +void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; FSP_M_TEST_CONFIG *m_t_cfg = &mupd->FspmTestConfig; -- cgit v1.2.3