From d2990ff5a3d620c2f989a1091eb86bb52942103d Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 3 May 2018 18:06:15 +0200 Subject: soc/intel: unify VBT fetching API Skylake used the inner function, wrapping it in the same set of tests as the common code does, but expressed differently. Change-Id: Ifa6912255e7874a6e80301d49128adda6f624209 Signed-off-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/26037 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/chip_fsp20.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'src/soc/intel/skylake') diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 6e9181677e..309392c461 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -97,11 +97,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig; static struct soc_intel_skylake_config *config; - uintptr_t vbt_data = 0; + uintptr_t vbt_data = (uintptr_t)vbt_get(); int i; - int is_s3_wakeup = acpi_is_wakeup_s3(); - struct device *dev = SA_DEV_ROOT; if (!dev || !dev->chip_info) { printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); @@ -117,19 +115,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) printk(BIOS_DEBUG, "psys_pmax = %d\n", tconfig->PsysPmax); } - /* Load VBT */ - if (is_s3_wakeup) { - printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n"); - } else if (display_init_required() && IS_ENABLED(CONFIG_RUN_FSP_GOP)) { - /* Get VBT data */ - vbt_data = (uintptr_t)locate_vbt(); - if (vbt_data) - printk(BIOS_DEBUG, "Passing VBT to GOP\n"); - else - printk(BIOS_DEBUG, "VBT not found!\n"); - } else { - printk(BIOS_DEBUG, "Not passing VBT to GOP\n"); - } params->GraphicsConfigPtr = (u32) vbt_data; for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) { -- cgit v1.2.3