From b000513741d330947bb832a5835378e35bdfb394 Mon Sep 17 00:00:00 2001
From: Lee Leahy <leroy.p.leahy@intel.com>
Date: Tue, 12 May 2015 18:19:47 -0700
Subject: soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC

Use the Broadwell implementation as the comparison base for Skylake.

BRANCH=none
BUG=None
TEST=None

Change-Id: I22eb55ea89eb0d6883f98e4c72a6d243e819e6d8
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10340
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
 src/soc/intel/skylake/smbus.c | 113 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)
 create mode 100644 src/soc/intel/skylake/smbus.c

(limited to 'src/soc/intel/skylake/smbus.c')

diff --git a/src/soc/intel/skylake/smbus.c b/src/soc/intel/skylake/smbus.c
new file mode 100644
index 0000000000..0ec84b27db
--- /dev/null
+++ b/src/soc/intel/skylake/smbus.c
@@ -0,0 +1,113 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <device/smbus.h>
+#include <device/smbus_def.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <soc/iomap.h>
+#include <soc/ramstage.h>
+#include <soc/smbus.h>
+
+static void pch_smbus_init(device_t dev)
+{
+	struct resource *res;
+	u16 reg16;
+
+	/* Enable clock gating */
+	reg16 = pci_read_config32(dev, 0x80);
+	reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14));
+	pci_write_config32(dev, 0x80, reg16);
+
+	/* Set Receive Slave Address */
+	res = find_resource(dev, PCI_BASE_ADDRESS_4);
+	if (res)
+		outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA);
+}
+
+static int lsmbus_read_byte(device_t dev, u8 address)
+{
+	u16 device;
+	struct resource *res;
+	struct bus *pbus;
+
+	device = dev->path.i2c.device;
+	pbus = get_pbus_smbus(dev);
+	res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
+
+	return do_smbus_read_byte(res->base, device, address);
+}
+
+static int lsmbus_write_byte(device_t dev, u8 address, u8 data)
+{
+	u16 device;
+	struct resource *res;
+	struct bus *pbus;
+
+	device = dev->path.i2c.device;
+	pbus = get_pbus_smbus(dev);
+	res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
+	return do_smbus_write_byte(res->base, device, address, data);
+}
+
+static struct smbus_bus_operations lops_smbus_bus = {
+	.read_byte	= lsmbus_read_byte,
+	.write_byte	= lsmbus_write_byte,
+};
+
+static void smbus_read_resources(device_t dev)
+{
+	struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
+	res->base = SMBUS_BASE_ADDRESS;
+	res->size = 32;
+	res->limit = res->base + res->size - 1;
+	res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
+		     IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+
+	/* Also add MMIO resource */
+	res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);
+}
+
+static struct device_operations smbus_ops = {
+	.read_resources		= &smbus_read_resources,
+	.set_resources		= &pci_dev_set_resources,
+	.enable_resources	= &pci_dev_enable_resources,
+	.scan_bus		= &scan_static_bus,
+	.init			= &pch_smbus_init,
+	.ops_smbus_bus		= &lops_smbus_bus,
+	.ops_pci		= &broadwell_pci_ops,
+};
+
+static const unsigned short pci_device_ids[] = {
+	0x9c22, /* LynxPoint */
+	0x9ca2, /* WildcatPoint */
+	0
+};
+
+static const struct pci_driver pch_smbus __pci_driver = {
+	.ops	 = &smbus_ops,
+	.vendor	 = PCI_VENDOR_ID_INTEL,
+	.devices = pci_device_ids,
+};
-- 
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