From e4a8537ce20d801a5985ba6268ae83593063a4bf Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sun, 24 Jul 2016 00:36:12 +0530 Subject: soc/intel/skylake: Add C entry bootblock support List of activity performing in this patch - early PCH programming - early SA programming - early CPU programming - mainborad early gpio programming for UART and SPI - car setup - move chipset programming from verstage to post console BUG=chrome-os-partner:55357 BRANCH=none TEST=Built and booted kunimitsu till POST code 0x34 Change-Id: If20ab869de62cd4439f3f014f9362ccbec38e143 Signed-off-by: Barnali Sarkar Signed-off-by: Naveen Krishna Chatradhi Signed-off-by: Rizwan Qureshi Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/15785 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/romstage/Makefile.inc | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) (limited to 'src/soc/intel/skylake/romstage/Makefile.inc') diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index 6ae81378a4..7a13084bf5 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,13 +1,10 @@ -verstage-y += cpu.c -verstage-y += i2c.c -verstage-y += pch.c +bootblock-y += cpu.c +bootblock-y += i2c.c +bootblock-y += pch.c +bootblock-y += report_platform.c +bootblock-y += smbus.c + verstage-y += power_state.c -verstage-y += report_platform.c -verstage-y += romstage.c -verstage-y += smbus.c -verstage-y += spi.c -verstage-y += systemagent.c -verstage-y += uart.c romstage-y += cpu.c romstage-y += i2c.c @@ -18,4 +15,3 @@ romstage-y += romstage.c romstage-y += smbus.c romstage-y += spi.c romstage-y += systemagent.c -romstage-y += uart.c -- cgit v1.2.3