From e6c8a38986deb508d46a4c9cf0cb568d92244c8f Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Mon, 26 Mar 2018 02:45:02 -0700 Subject: soc/intel/skylake: Add NHLT config for max98373 codec Add the NHLT configuration for the max98373 codec to skylake, taken directly from cannonlake. This will allow skylake/kabylake boards to use this codec. Change-Id: Ifb6bf2d31fda25b18d9b1ce2bb721255335d55e4 Signed-off-by: Duncan Laurie Reviewed-on: https://review.coreboot.org/25367 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: HARSHAPRIYA N Reviewed-by: Sathyanarayana Nujella --- src/soc/intel/skylake/nhlt/Makefile.inc | 11 +++++ src/soc/intel/skylake/nhlt/max98373.c | 77 +++++++++++++++++++++++++++++++++ 2 files changed, 88 insertions(+) create mode 100644 src/soc/intel/skylake/nhlt/max98373.c (limited to 'src/soc/intel/skylake/nhlt') diff --git a/src/soc/intel/skylake/nhlt/Makefile.inc b/src/soc/intel/skylake/nhlt/Makefile.inc index 9c9b4c8148..5c8bd80e3c 100644 --- a/src/soc/intel/skylake/nhlt/Makefile.inc +++ b/src/soc/intel/skylake/nhlt/Makefile.inc @@ -1,6 +1,7 @@ ramstage-y += dmic.c ramstage-y += nau88l25.c ramstage-y += max98357.c +ramstage-y += max98373.c ramstage-y += ssm4567.c ramstage-y += rt5514.c ramstage-y += rt5663.c @@ -20,6 +21,8 @@ DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin NAU88L25 = nau88l25-2ch-48khz-24b.bin MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin +MAX98373_RENDER_16B = max98373-render-2ch-48khz-16b.bin +MAX98373_RENDER_24B = max98373-render-2ch-48khz-24b.bin MAX98927_RENDER_24B = max98927-render-2ch-48khz-24b.bin MAX98927_RENDER_16B = max98927-render-2ch-48khz-16b.bin RT5514_CAPTURE = rt5514-capture-4ch-48khz-16b.bin @@ -52,6 +55,14 @@ cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) $(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) $(MAX98357_RENDER)-type := raw +cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_16B) +$(MAX98373_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_16B) +$(MAX98373_RENDER_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_24B) +$(MAX98373_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_24B) +$(MAX98373_RENDER_24B)-type := raw + cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_RENDER) $(SSM4567_RENDER)-file := $(NHLT_BLOB_PATH)/$(SSM4567_RENDER) $(SSM4567_RENDER)-type := raw diff --git a/src/soc/intel/skylake/nhlt/max98373.c b/src/soc/intel/skylake/nhlt/max98373.c new file mode 100644 index 0000000000..6d357f6a62 --- /dev/null +++ b/src/soc/intel/skylake/nhlt/max98373.c @@ -0,0 +1,77 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static const struct nhlt_format_config max98373_render_formats[] = { + /* 48 KHz 24-bits per sample. */ + { + .num_channels = 2, + .sample_freq_khz = 48, + .container_bits_per_sample = 32, + .valid_bits_per_sample = 24, + .speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT, + .settings_file = "max98373-render-2ch-48khz-24b.bin", + }, + /* 48 KHz 16-bits per sample. */ + { + .num_channels = 2, + .sample_freq_khz = 48, + .container_bits_per_sample = 16, + .valid_bits_per_sample = 16, + .speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT, + .settings_file = "max98373-render-2ch-48khz-16b.bin", + } +}; + +static const struct nhlt_format_config max98373_capture_formats[] = { + /* 48 KHz 16-bits per sample. */ + { + .num_channels = 2, + .sample_freq_khz = 48, + .container_bits_per_sample = 16, + .valid_bits_per_sample = 16, + .speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT, + .settings_file = "max98373-render-2ch-48khz-16b.bin", + }, +}; + +static const struct nhlt_endp_descriptor max98373_descriptors[] = { + { + .link = NHLT_LINK_SSP, + .device = NHLT_SSP_DEV_I2S, + .direction = NHLT_DIR_RENDER, + .vid = NHLT_VID, + .did = NHLT_DID_SSP, + .formats = max98373_render_formats, + .num_formats = ARRAY_SIZE(max98373_render_formats), + }, + { + .link = NHLT_LINK_SSP, + .device = NHLT_SSP_DEV_I2S, + .direction = NHLT_DIR_CAPTURE, + .vid = NHLT_VID, + .did = NHLT_DID_SSP, + .formats = max98373_capture_formats, + .num_formats = ARRAY_SIZE(max98373_capture_formats), + }, +}; + +int nhlt_soc_add_max98373(struct nhlt *nhlt, int hwlink) +{ + /* Virtual bus id of SSP links are the hardware port ids proper. */ + return nhlt_add_ssp_endpoints(nhlt, hwlink, max98373_descriptors, + ARRAY_SIZE(max98373_descriptors)); +} -- cgit v1.2.3