From c3385070d6e86dbde71dddbdef94ffa5579f9d11 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Thu, 21 Mar 2019 15:38:06 +0100
Subject: soc/{amd,intel}/chip: Use local include for chip.h

Change-Id: Ic1fcbf4b54b7d0b5cda04ca9f7fc145050c867b8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
 src/soc/intel/skylake/include/fsp11/soc/ramstage.h | 3 ++-
 src/soc/intel/skylake/include/fsp20/soc/ramstage.h | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

(limited to 'src/soc/intel/skylake/include')

diff --git a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
index 3ab0efa7e5..2071d58b49 100644
--- a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
@@ -17,11 +17,12 @@
 #ifndef _SOC_RAMSTAGE_H_
 #define _SOC_RAMSTAGE_H_
 
-#include <chip.h>
 #include <device/device.h>
 #include <fsp/ramstage.h>
 #include <fsp/soc_binding.h>
 
+#include "../../../chip.h"
+
 #define FSP_SIL_UPD SILICON_INIT_UPD
 #define FSP_MEM_UPD MEMORY_INIT_UPD
 
diff --git a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
index e75b350049..e5660a6f66 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
@@ -17,11 +17,12 @@
 #ifndef _SOC_RAMSTAGE_H_
 #define _SOC_RAMSTAGE_H_
 
-#include <chip.h>
 #include <device/device.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
 
+#include "../../../chip.h"
+
 #define FSP_SIL_UPD FSP_S_CONFIG
 #define FSP_MEM_UPD FSP_M_CONFIG
 
-- 
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