From af030503e8037f8147196290ea681192ab6b7732 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Sat, 8 Aug 2015 01:11:32 -0500 Subject: skylake: fix SMI GPI status handling The current construction for processing SMI GPI events didn't allow for the mainboard to query the state of a particular GPI for the snapshotted SMI event. The skylake part can route GPIs from any (there are design limitations) GPIO group. Those status and enable registers are within the GPIO community so one needs to gather all the possibilities in order to query the state. The call chain did this: southbridge_smi_gpi( clear_alt_smi_status() -> reset_alt_smi_status() -> print_all_smi_status() -> return 0) As a replacement the following functions and types are introduced: struct gpi_status - represent gpi status. gpi_status_get() - per gpi query on struct gpi_status gpi_clear_get_smi_status() - clear and retrieve SMI GPI status mainboard_smi_gpi_handler() - mainboard handler using gpi_status Also remove gpio_enable_all_smi() as that construct was never used, but it also is quite heavy handed in that it would enable SMI generation for all GPIs. BUG=chrome-os-partner:43778 BRANCH=None TEST=Built. Original-Change-Id: Ief977e60de65d9964b8ee58f2433cae5c93872ca Original-Signed-off-by: Aaron Durbin Original-Reviewed-on: https://chromium-review.googlesource.com/291933 Original-Reviewed-by: Duncan Laurie Change-Id: Ida009393c6af88ffe910195dc79a4c0d2a4c029e Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11208 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/skylake/include/soc/gpio.h | 21 ++++++++++++--------- src/soc/intel/skylake/include/soc/pm.h | 4 ---- src/soc/intel/skylake/include/soc/smm.h | 5 +++++ 3 files changed, 17 insertions(+), 13 deletions(-) (limited to 'src/soc/intel/skylake/include') diff --git a/src/soc/intel/skylake/include/soc/gpio.h b/src/soc/intel/skylake/include/soc/gpio.h index 2116c7efc2..488a2b5653 100644 --- a/src/soc/intel/skylake/include/soc/gpio.h +++ b/src/soc/intel/skylake/include/soc/gpio.h @@ -28,19 +28,22 @@ #include #include -/* SOC has 8 GPIO communities GPP A~G, GPD */ -#define GPIO_COMMUNITY_MAX 8 - typedef uint32_t gpio_t; -/* Clear GPIO SMI Status */ -void gpio_clear_all_smi(void); +/* Structure to represent GPI status for GPE and SMI. Use helper + * functions for interrogating particular GPIs. */ +struct gpi_status { + uint32_t grp[GPIO_NUM_GROUPS]; +}; -/* Get GPIO SMI Status */ -void gpio_get_smi_status(u32 status[GPIO_COMMUNITY_MAX]); +/* + * Clear GPI SMI status and fill in the structure representing enabled + * and set status. + */ +void gpi_clear_get_smi_status(struct gpi_status *sts); -/* Enable GPIO SMI */ -void gpio_enable_all_smi(void); +/* Return 1 if gpio is set in the gpi_status struct. Otherwise 0. */ +int gpi_status_get(const struct gpi_status *sts, gpio_t gpi); /* * Set the GPIO groups for the GPE blocks. The gpe0_route is interpreted diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index c0a165e8d9..3daa3203ed 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -174,10 +174,6 @@ uint32_t clear_smi_status(void); void enable_smi(uint32_t mask); void disable_smi(uint32_t mask); -/* ALT_GP_SMI */ -uint32_t clear_alt_smi_status(void); -void reset_alt_smi_status(void); - /* TCO */ uint32_t clear_tco_status(void); void enable_tco_sci(void); diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h index fbae6efdbf..212a4448b0 100644 --- a/src/soc/intel/skylake/include/soc/smm.h +++ b/src/soc/intel/skylake/include/soc/smm.h @@ -25,6 +25,7 @@ #include #include #include +#include struct ied_header { char signature[10]; @@ -51,6 +52,10 @@ struct smm_relocation_params { int smm_save_state_in_msrs; }; +/* Mainboard handler for GPI SMIs*/ +void mainboard_smi_gpi_handler(const struct gpi_status *sts); + + #if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) int smm_initialize(void); void smm_relocate(void); -- cgit v1.2.3