From 6a051f2b49d5d4b9605f4a4a2dfe46cd770704b3 Mon Sep 17 00:00:00 2001 From: Pratik Prajapati Date: Mon, 28 Aug 2017 15:30:20 -0700 Subject: soc/intel/skylake: Move UNCORE PRMRR base and mask defines. UNCORE PRMRR BASE and MASK MSRs are not common, so move to SOC specific header file and rename the #define to start with MSR_* Change-Id: I799c43f0b7a9eec5b3b69ab0f5100935c7f3f170 Signed-off-by: Pratik Prajapati Reviewed-on: https://review.coreboot.org/21247 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/include/soc/msr.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/skylake/include') diff --git a/src/soc/intel/skylake/include/soc/msr.h b/src/soc/intel/skylake/include/soc/msr.h index 4ff4ad2d49..0bd7f3ce60 100644 --- a/src/soc/intel/skylake/include/soc/msr.h +++ b/src/soc/intel/skylake/include/soc/msr.h @@ -32,6 +32,8 @@ #define IA32_PACKAGE_THERM_INTERRUPT 0x1b2 #define IA32_PLATFORM_DCA_CAP 0x1f8 #define MSR_LT_LOCK_MEMORY 0x2e7 +#define MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4 +#define MSR_UNCORE_PRMRR_PHYS_MASK 0x2f5 #define MSR_VR_CURRENT_CONFIG 0x601 #define MSR_VR_MISC_CONFIG 0x603 #define MSR_VR_MISC_CONFIG2 0x636 -- cgit v1.2.3