From 723a84e2920c8ba52257cf4bf445b23ff01d8754 Mon Sep 17 00:00:00 2001
From: Furquan Shaikh <furquan@chromium.org>
Date: Mon, 24 Oct 2016 15:27:21 -0700
Subject: soc/intel/skylake: Use intel common support to write-protect SPI
 flash

BUG=chrome-os-partner:58896

Change-Id: I281c799a1798f3353d78edd8a6cd16bbe762bc2c
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17116
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
 src/soc/intel/skylake/flash_controller.c | 31 ++++---------------------------
 1 file changed, 4 insertions(+), 27 deletions(-)

(limited to 'src/soc/intel/skylake/flash_controller.c')

diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c
index 6601e6caa3..56c7c69527 100644
--- a/src/soc/intel/skylake/flash_controller.c
+++ b/src/soc/intel/skylake/flash_controller.c
@@ -21,6 +21,7 @@
 #include <spi_flash.h>
 #include <timer.h>
 #include <soc/flash_controller.h>
+#include <soc/intel/common/spi.h>
 #include <soc/pci_devs.h>
 #include <soc/spi.h>
 
@@ -386,40 +387,16 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
 	return slave;
 }
 
-int spi_flash_protect(u32 start, u32 size)
+int spi_get_fpr_info(struct fpr_info *info)
 {
 	pch_spi_regs *spi_bar = get_spi_bar();
-	u32 end = start + size - 1;
-	u32 reg;
-	int prr;
 
 	if (!spi_bar)
 		return -1;
 
-	/* Find first empty PRR */
-	for (prr = 0; prr < SPI_PRR_MAX; prr++) {
-		reg = read32(&spi_bar->pr[prr]);
-		if (reg == 0)
-			break;
-	}
-	if (prr >= SPI_PRR_MAX) {
-		printk(BIOS_ERR, "ERROR: No SPI PRR free!\n");
-		return -1;
-	}
-
-	/* Set protected range base and limit */
-	reg = SPI_PRR(start, end) | SPI_PRR_WPE;
-
-	/* Set the PRR register and verify it is protected */
-	write32(&spi_bar->pr[prr], reg);
-	reg = read32(&spi_bar->pr[prr]);
-	if (!(reg & SPI_PRR_WPE)) {
-		printk(BIOS_ERR, "ERROR: Unable to set SPI PRR %d\n", prr);
-		return -1;
-	}
+	info->base = (uintptr_t)&spi_bar->pr[0];
+	info->max = SPI_FPR_MAX;
 
-	printk(BIOS_INFO, "%s: PRR %d is enabled for range 0x%08x-0x%08x\n",
-	       __func__, prr, start, end);
 	return 0;
 }
 
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