From 63f8c0af4ba934f0a9eaefaed6ae411404962196 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 10 Dec 2015 01:00:54 -0800 Subject: intel/skylake: Add elog event for THERMTRIP The THERMTRIP status bit is in GBLRST_CAUSE instead of GEN_PMCON like the EDSv1 indicates. Read this status bit and add an elog event if THERMTRIP has fired. BUG=chrome-os-partner:48438 BRANCH=none TEST=tested on chell EVT after thermtrip fired Change-Id: Icd52b753c7f3ab0d48095279f1255dd2dd08fd59 Signed-off-by: Patrick Georgi Original-Commit-Id: b090c7897a8f99a685f523990235d83fafa063b2 Original-Change-Id: I5a287d7fdae2ba8ae8585cb9a4d4dd873393e1e6 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/317242 Original-Reviewed-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/12980 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/skylake/elog.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/skylake/elog.c') diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 4c0d62336e..bbc414763f 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -70,8 +70,9 @@ static void pch_log_wake_source(struct chipset_power_state *ps) static void pch_log_power_and_resets(struct chipset_power_state *ps) { - /* TODO: Thermal Trip Status. There is a thermal device and - * other status registers. */ + /* Thermal Trip */ + if (ps->gblrst_cause[0] & GBLRST_CAUSE0_THERMTRIP) + elog_add_event(ELOG_TYPE_THERM_TRIP); /* PWR_FLR Power Failure */ if (ps->gen_pmcon_b & PWR_FLR) -- cgit v1.2.3