From 44e89af6e609874f2f18d30f1e66dce8b5a98eff Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sat, 23 Feb 2019 19:24:51 +0100 Subject: soc/intel/skylake: Unify serial IRQ options We had two ways to configure the serial IRQ mode. One time in the devicetree for FSP and one time through Kconfig for coreboot. We'll use `enum serirq_mode` from soc/intel/common/ as a devicetree option instead. As the default is `quiet mode` here and that is the most common mode, this saves us a lot of lines. In four cases kblrvp8, 11 and librem 13v2, 15v3, we had conflicting settings in devicetree and Kconfig. We'll maintain the `continuous` selection, although it might be that coreboot overrode this earlier on the kblrvps. Note: A lot of Google boards have serial IRQ enabled, while the pin seems to be unconnected? Change-Id: I79f0cd302e335d8dcf8bf6bc32f3d40ca6713e5c Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/31596 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Matt DeVillier Reviewed-by: Furquan Shaikh --- src/soc/intel/skylake/chip.h | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'src/soc/intel/skylake/chip.h') diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index f131a1a5df..a8ee064c19 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -428,13 +429,7 @@ struct soc_intel_skylake_config { RESET_POWER_CYCLE_4S = 4, } PmConfigPwrCycDur; - /* Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled.*/ - u8 SerialIrqConfigSirqEnable; - - enum { - SERIAL_IRQ_QUIET_MODE = 0, - SERIAL_IRQ_CONTINUOUS_MODE = 1, - } SerialIrqConfigSirqMode; + enum serirq_mode serirq_mode; enum { SERIAL_IRQ_FRAME_PULSE_4CLK = 0, -- cgit v1.2.3