From df21440d682403aec56912a44fb7c4bffd507e8e Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Mon, 14 Dec 2015 16:44:26 -0600 Subject: intel/skylake: provide default VR configuration FSP 1.8.0 will do nothing with the VR settings if VrConfigEnable is non-zero. That behavior is not desired because it's not clear what the behavior will be for various processor SKUs. Instead provide default values for the VR config. Note that PSI3 and PSI4 are not enabled for those defaults. BUG=chrome-os-partner:48466 BRANCH=None TEST=Built and booted glados. Change-Id: I02cb5fbdd4549cc827a0b0e4006bc21da4593b55 Signed-off-by: Patrick Georgi Original-Commit-Id: a68c53e0fdf15584270dfafc679a22319f497d17 Original-Change-Id: I82b1d1da2cfa3c83ccc6a981e30ffac6fb6c8c4b Original-Signed-off-by: Aaron Durbin Original-Reviewed-on: https://chromium-review.googlesource.com/318263 Original-Reviewed-by: Duncan Laurie Reviewed-on: https://review.coreboot.org/12983 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/skylake/chip.c | 24 ++---------------------- 1 file changed, 2 insertions(+), 22 deletions(-) (limited to 'src/soc/intel/skylake/chip.c') diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index f4dc4a729f..b6485f7d94 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -359,28 +359,8 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) else params->PsfUnlock = 0; - for (i = 0; i < ARRAY_SIZE(config->domain_vr_config); i++) { - params->VrConfigEnable[i] = - config->domain_vr_config[i].vr_config_enable; - params->Psi1Threshold[i] = - config->domain_vr_config[i].psi1threshold; - params->Psi2Threshold[i] = - config->domain_vr_config[i].psi2threshold; - params->Psi3Threshold[i] = - config->domain_vr_config[i].psi3threshold; - params->Psi3Enable[i] = - config->domain_vr_config[i].psi3enable; - params->Psi4Enable[i] = - config->domain_vr_config[i].psi4enable; - params->ImonSlope[i] = - config->domain_vr_config[i].imon_slope; - params->ImonOffset[i] = - config->domain_vr_config[i].imon_offset; - params->IccMax[i] = - config->domain_vr_config[i].icc_max; - params->VrVoltageLimit[i] = - config->domain_vr_config[i].voltage_limit; - } + for (i = 0; i < ARRAY_SIZE(config->domain_vr_config); i++) + fill_vr_domain_config(params, i, &config->domain_vr_config[i]); /* Show SPI controller if enabled in devicetree.cb */ dev = dev_find_slot(0, PCH_DEVFN_SPI); -- cgit v1.2.3