From c248044b20d270d14cf460b04972b7ff741685d0 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 20 Feb 2017 13:41:56 -0800 Subject: soc/intel/skylake: Fix broken suspend-resume With recent change (a4b11e5c90: soc/intel/skylake: Perform CPU MP Init before FSP-S Init) to perform CPU MP init before FSP-S init, suspend resume is currently broken for all skylake/kabylake boards. All the skylake/kabylake boards store external stage cache in TSEG, which is relocated post MP-init. Thus, if FSP loading and initialization is done after MP-init, then ramstage is not able to: 1. Save FSP component in external stage cache during normal boot, and 2. Load FSP component from external stage cache during resume In order to fix this, ensure that FSP loading happens separately from FSP initialization. Add fsp_load callback for pre_mp_init which ensures that the required FSP component is loaded/saved from/to external stage cache. BUG=chrome-os-partner:63114 BRANCH=None TEST=Verified that 100 cycles of suspend/resume worked fine on poppy. Change-Id: I5b4deaf936a05b9bccf2f30b949674e2ba993488 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/18414 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/chip.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc/intel/skylake/chip.c') diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 060c4ee0a5..744f5491a1 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -33,6 +33,11 @@ void soc_init_pre_device(void *chip_info) intel_silicon_init(); } +void soc_fsp_load(void) +{ + fsp_load(); +} + static void pci_domain_set_resources(device_t dev) { assign_resources(dev->link_list); -- cgit v1.2.3