From 682355ab16a946dce3f989b9581196a888b17ee8 Mon Sep 17 00:00:00 2001
From: Barnali Sarkar <barnali.sarkar@intel.com>
Date: Tue, 6 Jun 2017 15:22:30 +0530
Subject: soc/intel/skylake: Move update microcode from cbfs to mp_ops
 callbacks

FIT is already loading microcode before CPU Reset. So, we need
not update the microcode again in RO FW in bootblock.

But we need to update in RW FW if there is any new ucode version.
So, added the update microcode function in get_microcode_info callback
before MP Init to make sure BSP is using the microcode from cbfs.

BUG=none
BRANCH=none
TEST=Build and Boot poppy

Change-Id: I5606563726c00974f00285acfa435cadc90a085e
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/20051
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
---
 src/soc/intel/skylake/bootblock/cpu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

(limited to 'src/soc/intel/skylake/bootblock')

diff --git a/src/soc/intel/skylake/bootblock/cpu.c b/src/soc/intel/skylake/bootblock/cpu.c
index 6963b829ea..ee344efb13 100644
--- a/src/soc/intel/skylake/bootblock/cpu.c
+++ b/src/soc/intel/skylake/bootblock/cpu.c
@@ -16,7 +16,7 @@
 
 #include <arch/io.h>
 #include <console/console.h>
-#include <cpu/intel/microcode/microcode.c>
+#include <cpu/x86/msr.h>
 #include <delay.h>
 #include <intelblocks/fast_spi.h>
 #include <reset.h>
@@ -89,7 +89,6 @@ void bootblock_cpu_init(void)
 	fast_spi_cache_bios_region();
 	/* Set flex ratio and reset if needed */
 	set_flex_ratio_to_tdp_nominal();
-	intel_update_microcode_from_cbfs();
 }
 
 void set_max_freq(void)
-- 
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