From b439a929392ba54dee43455f6e164b884cb8c308 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Thu, 16 Mar 2017 16:44:36 -0700 Subject: soc/intel/skylake: Wrap lines at 80 columns Fix the following warning detected by checkpatch: WARNING: line over 80 characters TEST=Build for glados Change-Id: I79341f46ca06ac052f987975ccaf975470d27806 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/18867 Tested-by: build bot (Jenkins) Reviewed-by: Lee Leahy --- src/soc/intel/skylake/bootblock/pch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/skylake/bootblock/pch.c') diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c index 6279cf2b6d..07beae8f9e 100644 --- a/src/soc/intel/skylake/bootblock/pch.c +++ b/src/soc/intel/skylake/bootblock/pch.c @@ -192,8 +192,8 @@ static void soc_config_pwrmbase(void) * * Program "PM Base Address Memory Range Limit" PCR[DMI] + 27ACh[31:16] * to the value programmed in PMC PCI Offset 48h bit[31:16], this has an - * implication of making sure the memory allocated to PWRMBASE to be 64KB - * in size. + * implication of making sure the memory allocated to PWRMBASE to be + * 64KB in size. */ pcr_write32(PID_DMI, R_PCH_PCR_DMI_PMBASEA, ((PCH_PWRM_BASE_ADDRESS & 0xFFFF0000) | -- cgit v1.2.3