From 015c64335d13b9e213fa93127d621c574b17018e Mon Sep 17 00:00:00 2001
From: Aamir Bohra <aamir.bohra@intel.com>
Date: Thu, 6 Apr 2017 11:15:18 +0530
Subject: soc/intel/skylake: Use LPSS common library

Use lpss common library to program reset and
clock register for lpss modules.

Change-Id: I198feba7c6f6d033ab77ed25a5bd9ea99411a1e4
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19153
Tested-by: build bot (Jenkins)
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/soc/intel/skylake/bootblock/i2c.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

(limited to 'src/soc/intel/skylake/bootblock/i2c.c')

diff --git a/src/soc/intel/skylake/bootblock/i2c.c b/src/soc/intel/skylake/bootblock/i2c.c
index 11d145c7bf..59cb5c8bc2 100644
--- a/src/soc/intel/skylake/bootblock/i2c.c
+++ b/src/soc/intel/skylake/bootblock/i2c.c
@@ -18,11 +18,11 @@
 #include <device/device.h>
 #include <device/i2c.h>
 #include <device/pci_def.h>
+#include <intelblocks/lpss.h>
 #include <soc/intel/common/lpss_i2c.h>
 #include <soc/iomap.h>
 #include <soc/pci_devs.h>
 #include <soc/bootblock.h>
-#include <soc/serialio.h>
 #include "chip.h"
 
 uintptr_t lpss_i2c_base_address(unsigned int bus)
@@ -49,8 +49,6 @@ static void i2c_early_init_bus(unsigned int bus)
 	pci_devfn_t dev;
 	int devfn;
 	uintptr_t base;
-	uint32_t value;
-	void *reg;
 
 	/* Find the PCI device for this bus controller */
 	devfn = i2c_bus_to_devfn(bus);
@@ -77,11 +75,7 @@ static void i2c_early_init_bus(unsigned int bus)
 			   PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
 
 	/* Take device out of reset */
-	reg = (void *)(base + SIO_REG_PPR_RESETS);
-	value = read32(reg);
-	value |= SIO_REG_PPR_RESETS_FUNC | SIO_REG_PPR_RESETS_APB |
-		SIO_REG_PPR_RESETS_IDMA;
-	write32(reg, value);
+	lpss_reset_release(base);
 
 	/* Initialize the controller */
 	lpss_i2c_init(bus, &config->i2c[bus]);
-- 
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