From 86d937fb46bfb3b4d5c850b28e79ff25cb56faa4 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 27 Aug 2015 16:01:08 -0700 Subject: skylake: ACPI: Clean up pch.asl Clean up the code in pch.asl: - move all the C header includes into here instead of duplicated in various ASL files included from here - move the trap field definition into platform.asl with the method - alphebetize the includes - move gpio.asl include into pch.asl - remove duplicate irqlinks.asl include from lpc.asl BUG=chrome-os-partner:44622 BRANCH=none TEST=emerge-glados coreboot Change-Id: I51b1c5286fc344df6942a24c1dea71abf10ab561 Signed-off-by: Patrick Georgi Original-Commit-Id: 3ee9c4afa031191d275f0d3d40b2b15b85369b2f Original-Change-Id: I3bae434ad227273885d8436db23e17e593739f77 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/295903 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11530 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/acpi/platform.asl | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/soc/intel/skylake/acpi/platform.asl') diff --git a/src/soc/intel/skylake/acpi/platform.asl b/src/soc/intel/skylake/acpi/platform.asl index 2bbe97be80..f0ed4e0816 100644 --- a/src/soc/intel/skylake/acpi/platform.asl +++ b/src/soc/intel/skylake/acpi/platform.asl @@ -36,6 +36,16 @@ Field (POST, ByteAcc, Lock, Preserve) DBG0, 8 } +/* IO-Trap at 0x800. + * This is the ACPI->SMI communication interface. + */ +OperationRegion (IO_T, SystemIO, 0x800, 0x10) +Field (IO_T, ByteAcc, NoLock, Preserve) +{ + Offset (0x8), + TRP0, 8 /* IO-Trap at 0x808 */ +} + /* SMI I/O Trap */ Method (TRAP, 1, Serialized) { -- cgit v1.2.3