From bf9df75eac002296b570620f824d7bf7011de1e4 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 27 Aug 2015 16:03:45 -0700 Subject: skylake: ACPI: Add functions for PCR access There are a few places in ACPI that touch PCR registers, either to read a value or to set some magic bits. Expose some functions for this that will keep all the PCR access in one location instead of spread throughout the code. BUG=chrome-os-partner:44622 BRANCH=none TEST=emerge-glados coreboot Change-Id: Iafeb3e2cd8f38af10d29eaaf18f2380c5651fe6d Signed-off-by: Patrick Georgi Original-Commit-Id: e78b2801fbc5c00ba452ae5e4ecb07c3e23bf6c1 Original-Change-Id: I2e4d491157f7ac6d2ebc231b11661c059b4a7fa0 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/295904 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11531 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/acpi/pch.asl | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/skylake/acpi/pch.asl') diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index 18a41f25b3..581efa082b 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -37,6 +37,8 @@ /* PCIE Ports */ #include "pcie.asl" +/* PCR Access */ +#include "pcr.asl" /* Serial IO */ #include "serialio.asl" -- cgit v1.2.3