From 2020cbb6ed45a282d1236dca91dce86d03360132 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 3 Jul 2019 10:20:40 +0200 Subject: soc/intel/skylake: Add Kabylake-R microcode update files MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This also corrects some CPU naming in comments. Change-Id: I8b9fc3ba0d6dc6e0001b40518aae2d26c1184dc8 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/34000 Reviewed-by: Nico Huber Reviewed-by: Kyösti Mälkki Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/Makefile.inc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/skylake/Makefile.inc') diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 25dce05226..20fba29116 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -84,13 +84,15 @@ postcar-y += uart.c ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y) # Skylake H Q0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03 -# Kabylake HB0 +# Kabylake H B0 S0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09 else # Skylake D0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-4e-03 -# Kabylake H0, Y0 +# Kabylake H0, J0, J1 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-09 +# Kabylake Y0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a endif # Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) # since those are probably pre-release samples. -- cgit v1.2.3