From a1c8b34d7b1b3a8df5b86faab79010c06b037445 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 8 Sep 2015 16:12:44 -0700 Subject: skylake: Use common ACPI _SWS code Enable and use the common code for filling out the NVS data used by the _SWS methods. Add a function to provide the wake source data. With Deep S3 enabled skylake does not retain the contents of the PM1_EN register so instead just select the wake related events in PM1_STS. BUG=chrome-os-partner:40635 BRANCH=none TEST=tested on glados by checking for valid _SWS string in /sys/firmware/log after suspend/resume. Wake sources that were tested are RTC, power button, keypress, trackpad, and wifi. Change-Id: I93a4f740f2e2ef1c34e948db1d8e273332296921 Signed-off-by: Patrick Georgi Original-Commit-Id: cb4d4705b87ef7169f1979009c34a58de93c4ef0 Original-Change-Id: Ib6b4df09ea3090894f09290d00dcdc5aebc3eabb Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/298169 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11648 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/skylake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/skylake/Kconfig') diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 07c1d4140e..1ccde4ab02 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -37,6 +37,7 @@ config CPU_SPECIFIC_OPTIONS select RELOCATABLE_MODULES select RELOCATABLE_RAMSTAGE select SOC_INTEL_COMMON + select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_FSP_RAM_INIT select SOC_INTEL_COMMON_FSP_ROMSTAGE select SOC_INTEL_COMMON_RESET -- cgit v1.2.3