From 723a84e2920c8ba52257cf4bf445b23ff01d8754 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 24 Oct 2016 15:27:21 -0700 Subject: soc/intel/skylake: Use intel common support to write-protect SPI flash BUG=chrome-os-partner:58896 Change-Id: I281c799a1798f3353d78edd8a6cd16bbe762bc2c Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/17116 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie Reviewed-by: Paul Menzel --- src/soc/intel/skylake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/skylake/Kconfig') diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 5a1d878f90..a5fb0e8d84 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -44,6 +44,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_LPSS_I2C select SOC_INTEL_COMMON_NHLT select SOC_INTEL_COMMON_RESET + select SOC_INTEL_COMMON_SPI_PROTECT select SMM_TSEG select SMP select SSE2 -- cgit v1.2.3