From 3406dd64c328bf0f2f1902d42b239f84c136e4f0 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Fri, 4 Aug 2017 15:58:26 -0700 Subject: soc/intel/common/uart: Refactor uart_common_init 1. Create a new function uart_lpss_init which takes the UART LPSS controller out of reset and initializes and enables clock. 2. Instead of passing in m/n clock divider values as parameters to uart_common_init, introduce Kconfig variables so that uart_lpss_init can use the values directly without having to query the SoC. BUG=b:64030366 TEST=Verified that UART still works on APL and KBL boards. Change-Id: I74d01b0037d8c38fe6480c38ff2283d76097282a Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/20884 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/soc/intel/skylake/Kconfig') diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 32c2654c4d..f0402a9e2b 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -317,4 +317,13 @@ config CPU_BCLK_MHZ int default 100 +# Clock divider parameters for 115200 baud rate +config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL + hex + default 0x30 + +config SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL + hex + default 0xc35 + endif -- cgit v1.2.3