From f1e22d5c39cd341f90463908a6cfe5db4fecacda Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 13 Jul 2016 23:27:12 -0500 Subject: soc/intel/quark: use common Intel ACPI hardware definitions Transition to using the common Intel ACPI hardware definitions generic ACPI definitions. BUG=chrome-os-partner:54977 Change-Id: I034c083604892a5fa25dff3b50e327e0a885b021 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/15683 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: Furquan Shaikh Reviewed-by: Lee Leahy --- src/soc/intel/quark/include/soc/pm.h | 6 +----- src/soc/intel/quark/romstage/romstage.c | 4 ++-- 2 files changed, 3 insertions(+), 7 deletions(-) (limited to 'src/soc/intel/quark') diff --git a/src/soc/intel/quark/include/soc/pm.h b/src/soc/intel/quark/include/soc/pm.h index f9ae027c48..30d8841e34 100644 --- a/src/soc/intel/quark/include/soc/pm.h +++ b/src/soc/intel/quark/include/soc/pm.h @@ -18,11 +18,7 @@ #define _SOC_PM_H_ #include - -/* Generic sleep state types */ -#define SLEEP_STATE_S0 0 -#define SLEEP_STATE_S3 3 -#define SLEEP_STATE_S5 5 +#include struct chipset_power_state { uint32_t prev_sleep_state; diff --git a/src/soc/intel/quark/romstage/romstage.c b/src/soc/intel/quark/romstage/romstage.c index 2a4c658745..457c922a96 100644 --- a/src/soc/intel/quark/romstage/romstage.c +++ b/src/soc/intel/quark/romstage/romstage.c @@ -117,7 +117,7 @@ struct chipset_power_state *fill_power_state(void) { struct chipset_power_state *ps = car_get_var_ptr(&power_state); - ps->prev_sleep_state = 0; + ps->prev_sleep_state = ACPI_S0; printk(BIOS_DEBUG, "prev_sleep_state %d\n", ps->prev_sleep_state); return ps; } @@ -147,7 +147,7 @@ void soc_memory_init_params(struct romstage_params *params, hexdump((void *)0x000ffff0, 0x10); /* Clear SMI and wake events */ - if (ps->prev_sleep_state != 3) { + if (ps->prev_sleep_state != ACPI_S3) { printk(BIOS_SPEW, "Clearing SMI interrupts and wake events\n"); reg_script_run_on_dev(LPC_BDF, clear_smi_and_wake_events); } -- cgit v1.2.3