From b8f532310719668ac3f13c4b02273bb256742163 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 4 Jan 2017 08:26:53 -0800 Subject: soc/intel/quark: Add the verstage files Add the files to support verstage for vboot. TEST=Build and run on Galileo Gen2 Change-Id: Icf87075012c08cf581c17d579e0763888c707265 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/18040 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/soc/intel/quark/Makefile.inc | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc/intel/quark') diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index bd297ed8d7..1d66e6beba 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -25,6 +25,11 @@ bootblock-y += reg_access.c bootblock-y += tsc_freq.c bootblock-y += uart_common.c +verstage-y += i2c.c +verstage-y += reg_access.c +verstage-y += tsc_freq.c +verstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c + romstage-y += i2c.c romstage-y += memmap.c romstage-y += reg_access.c -- cgit v1.2.3