From 8fee9951d30d03b4bca16c198b887c5415418c12 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 29 Jan 2021 23:14:53 +0200 Subject: sb,soc/intel: Add wake source fields in GNVS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For the moment, these are most not used but become a necessity for a unified approach. They would be required for the implementation of _SWS method for OSPM to determine the reason for system waking up. The related hardware registers are present with these platforms. It's expected that ACPI power-management related GNVS entries are grouped together to form a single struct in later works. Change-Id: I6d31d39ac1017cd6fdf0ac66b418d1fbb1edf8e0 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50193 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/quark/include/soc/nvs.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/quark') diff --git a/src/soc/intel/quark/include/soc/nvs.h b/src/soc/intel/quark/include/soc/nvs.h index fee0e42a7d..64378cce3d 100644 --- a/src/soc/intel/quark/include/soc/nvs.h +++ b/src/soc/intel/quark/include/soc/nvs.h @@ -8,6 +8,10 @@ struct __packed global_nvs { uint32_t cbmc; /* 0x00 - 0x03 - coreboot Memory Console */ uint8_t pwrs; /* 0x4 - Power state (AC = 1) */ + + /* Required for future unified acpi_save_wake_source. */ + uint32_t pm1i; + uint32_t gpei; }; #endif /* SOC_INTEL_QUARK_NVS_H */ -- cgit v1.2.3