From 81100bf7ff62c4ee53214afb82f2fa9112d109b6 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 16 Aug 2019 10:37:15 +0300 Subject: soc/intel: Move fill_postcar_frame to memmap.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I84b1fad52d623a879f00c3f721f480f58d7d6d8a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34894 Reviewed-by: Angel Pons Reviewed-by: David Guckian Tested-by: build bot (Jenkins) --- src/soc/intel/quark/romstage/fsp2_0.c | 25 ------------------------- 1 file changed, 25 deletions(-) (limited to 'src/soc/intel/quark/romstage') diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c index bd30271d77..57e35eeb3c 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp2_0.c @@ -66,31 +66,6 @@ asmlinkage void car_stage_c_entry(void) /* We do not return here. */ } -void fill_postcar_frame(struct postcar_frame *pcf) -{ - uintptr_t top_of_ram; - uintptr_t top_of_low_usable_memory; - - /* Locate the top of RAM */ - top_of_low_usable_memory = (uintptr_t) cbmem_top(); - top_of_ram = ALIGN(top_of_low_usable_memory, 16 * MiB); - - /* Cache postcar and ramstage */ - postcar_frame_add_mtrr(pcf, top_of_ram - (16 * MiB), 16 * MiB, - MTRR_TYPE_WRBACK); - - /* Cache RMU area */ - postcar_frame_add_mtrr(pcf, (uintptr_t) top_of_low_usable_memory, - 0x10000, MTRR_TYPE_WRTHROUGH); - - /* Cache ESRAM */ - postcar_frame_add_mtrr(pcf, 0x80000000, 0x80000, MTRR_TYPE_WRBACK); - - pcf->skip_common_mtrr = 1; - /* Cache SPI flash - Write protect not supported */ - postcar_frame_add_romcache(pcf, MTRR_TYPE_WRTHROUGH); -} - static struct chipset_power_state power_state; struct chipset_power_state *get_power_state(void) -- cgit v1.2.3