From 5ef051a53a03d537b6feab4e85edb69835eb6998 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Fri, 29 Apr 2016 15:16:54 -0700 Subject: soc/intel/quark: Add PCIe reset support Migrate PCIe reset from PlatformPciHelperLib in QuarkFspPkg into coreboot. Change-Id: I1c33fa16b0323091e8f9bd503bbfdb8a253a76d4 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/14944 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/quark/reg_access.c | 38 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/quark/reg_access.c') diff --git a/src/soc/intel/quark/reg_access.c b/src/soc/intel/quark/reg_access.c index 4734135b2c..f7820e9f4c 100644 --- a/src/soc/intel/quark/reg_access.c +++ b/src/soc/intel/quark/reg_access.c @@ -15,10 +15,9 @@ #define __SIMPLE_DEVICE__ -#include #include #include -#include +#include static uint32_t *get_gpio_address(uint32_t reg_address) { @@ -108,6 +107,24 @@ void reg_legacy_gpio_write(uint32_t reg_address, uint32_t value) outl(value, get_legacy_gpio_address(reg_address)); } +static uint32_t reg_pcie_afe_read(uint32_t reg_address) +{ + /* Read the PCIE AFE register */ + mea_write(reg_address); + mcr_write(QUARK_OPCODE_IO_READ, QUARK_SC_PCIE_AFE_SB_PORT_ID, + reg_address); + return mdr_read(); +} + +static void reg_pcie_afe_write(uint32_t reg_address, uint32_t value) +{ + /* Write the PCIE AFE register */ + mea_write(reg_address); + mdr_write(value); + mcr_write(QUARK_OPCODE_IO_WRITE, QUARK_SC_PCIE_AFE_SB_PORT_ID, + reg_address); +} + uint32_t reg_rmu_temp_read(uint32_t reg_address) { /* Read the RMU temperature register */ @@ -181,6 +198,10 @@ static uint64_t reg_read(struct reg_script_context *ctx) case LEG_GPIO_REGS: ctx->display_prefix = "Legacy GPIO: "; value = reg_legacy_gpio_read(step->reg); + + case PCIE_AFE_REGS: + ctx->display_prefix = "PCIe AFE: "; + value = reg_pcie_afe_read(step->reg); break; case RMU_TEMP_REGS: @@ -223,6 +244,19 @@ static void reg_write(struct reg_script_context *ctx) reg_legacy_gpio_write(step->reg, (uint32_t)step->value); break; + case PCIE_AFE_REGS: + ctx->display_prefix = "PCIe AFE: "; + reg_pcie_afe_write(step->reg, (uint32_t)step->value); + break; + + case PCIE_RESET: + if (ctx->display_features) { + ctx->display_prefix = "PCIe reset: "; + ctx->display_features &= ~REG_SCRIPT_DISPLAY_REGISTER; + } + mainboard_gpio_pcie_reset(step->value); + break; + case RMU_TEMP_REGS: ctx->display_prefix = "RMU TEMP"; reg_rmu_temp_write(step->reg, (uint32_t)step->value); -- cgit v1.2.3