From ae738acdc5f02d232e035538c67d63ba19b9ccaa Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Sun, 24 Jul 2016 08:03:37 -0700 Subject: cpu/x86: Support CPUs without rdmsr/wrmsr instructions Quark does not support the rdmsr and wrmsr instructions. In this case use a SOC specific routine to support the setting of the MTRRs. Migrate the code from FSP 1.1 to be x86 CPU common. Since all rdmsr/wrmsr accesses are being converted, fix the build failure for quark in lib/reg_script.c. Move the soc_msr_x routines and their depencies from romstage/mtrr.c to reg_access.c. TEST=Build and run on Galileo Gen2 Change-Id: Ibc68e696d8066fbe2322f446d8c983d3f86052ea Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/15839 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/quark/include/soc/reg_access.h | 3 +++ src/soc/intel/quark/include/soc/romstage.h | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/quark/include') diff --git a/src/soc/intel/quark/include/soc/reg_access.h b/src/soc/intel/quark/include/soc/reg_access.h index 8a1833349e..a07bd22d9a 100644 --- a/src/soc/intel/quark/include/soc/reg_access.h +++ b/src/soc/intel/quark/include/soc/reg_access.h @@ -19,6 +19,7 @@ #define __SIMPLE_DEVICE__ #include +#include #include #include #include @@ -230,6 +231,8 @@ void mcr_write(uint8_t opcode, uint8_t port, uint32_t reg_address); uint32_t mdr_read(void); void mdr_write(uint32_t value); void mea_write(uint32_t reg_address); +uint32_t port_reg_read(uint8_t port, uint32_t offset); +void port_reg_write(uint8_t port, uint32_t offset, uint32_t value); uint32_t reg_host_bridge_unit_read(uint32_t reg_address); uint32_t reg_legacy_gpio_read(uint32_t reg_address); void reg_legacy_gpio_write(uint32_t reg_address, uint32_t value); diff --git a/src/soc/intel/quark/include/soc/romstage.h b/src/soc/intel/quark/include/soc/romstage.h index 47545acdee..7d89c8b02a 100644 --- a/src/soc/intel/quark/include/soc/romstage.h +++ b/src/soc/intel/quark/include/soc/romstage.h @@ -26,8 +26,6 @@ #include asmlinkage void *car_state_c_entry(void); -uint32_t port_reg_read(uint8_t port, uint32_t offset); -void port_reg_write(uint8_t port, uint32_t offset, uint32_t value); void report_platform_info(void); int set_base_address_and_enable_uart(u8 bus, u8 dev, u8 func, u32 mmio_base); void pcie_init(void); -- cgit v1.2.3