From 654fd0703ad8f785faa49b22bf59036c6eb47f6c Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 17 Feb 2016 08:47:58 -0800 Subject: soc/intel/quark: Enable HSUART1 Enable HSUART1 for debug serial output. Specify the fixed resources in the UART driver. This keeps debug serial output flowing during the rest of the device initialization. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Testing successful if: * Debug serial output stays enabled after BS_DEV_RESOURCES state Change-Id: Ica02e5fece156b21d4a3889284ca467d55c7880d Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/13730 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/quark/Makefile.inc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/quark/Makefile.inc') diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index f107fdf6c6..90398d2c13 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -20,12 +20,13 @@ subdirs-y += ../../../cpu/x86/tsc romstage-y += memmap.c romstage-y += tsc_freq.c -romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c +romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c ramstage-y += chip.c ramstage-y += memmap.c ramstage-y += northcluster.c ramstage-y += tsc_freq.c +ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c CPPFLAGS_common += -I$(src)/soc/intel/quark -- cgit v1.2.3