From 2ed7eb795cbcef16e7647d2ccb6052e7057456b5 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Fri, 1 Jan 2016 18:08:48 -0800 Subject: soc/intel/quark: Add minimal Quark SoC X1000 files Add the files for minimal Quark X1000 SoC support: * Declare pei_data structure * Declare sleep states and chipset_power_state structure * Specify top of memory * Empty FspUpdVpd.h file TEST=None Change-Id: If741f84904394780e1f29bd6ddbd81514c3e21c9 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/13439 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/quark/Makefile.inc | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 src/soc/intel/quark/Makefile.inc (limited to 'src/soc/intel/quark/Makefile.inc') diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc new file mode 100644 index 0000000000..6327ae6548 --- /dev/null +++ b/src/soc/intel/quark/Makefile.inc @@ -0,0 +1,29 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2015-2016 Intel Corporation. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ifeq ($(CONFIG_SOC_INTEL_QUARK),y) + +subdirs-y += ../../../cpu/x86/tsc + +romstage-y += memmap.c + +ramstage-y += memmap.c + +CPPFLAGS_common += -I$(src)/soc/intel/quark/include + +# Chipset microcode path +CPPFLAGS_common += -I3rdparty/blobs/soc/intel/quark + +endif # CONFIG_SOC_INTEL_QUARK -- cgit v1.2.3