From 3a26aec8bdab3cbc8526681f70f061424b6999ac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= Date: Tue, 28 May 2024 12:35:08 +0200 Subject: soc/intel/meteorlake: Hook up PchHdaAudioLinkHdaEnable to devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The comment that the PchHdaAudioLink UPDs only configure GPIOs is incorrect. Setting this to 1 is needed to enable HDA audio link. Same exact situation as with Alder Lake in CL 71715. Change-Id: Iecbe106ae18b5a8b53c04a5335a4e4c4ae27c7a0 Signed-off-by: Michał Kopeć Reviewed-on: https://review.coreboot.org/c/coreboot/+/82685 Tested-by: build bot (Jenkins) Reviewed-by: Tim Crawford --- src/soc/intel/meteorlake/chip.h | 1 + src/soc/intel/meteorlake/romstage/fsp_params.c | 8 +------- 2 files changed, 2 insertions(+), 7 deletions(-) (limited to 'src/soc/intel/meteorlake') diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 0c76b7cda0..7168369948 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -247,6 +247,7 @@ struct soc_intel_meteorlake_config { uint16_t sata_ports_dito_val[8]; /* Audio related */ + uint8_t pch_hda_audio_link_hda_enable; uint8_t pch_hda_dsp_enable; bool pch_hda_sdi_enable[MAX_HD_AUDIO_SDI_LINKS]; diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 0f44d658cb..ec0bb8dae6 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -288,17 +288,11 @@ static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg, m_cfg->PchHdaIDispLinkTmode = config->pch_hda_idisp_link_tmode; m_cfg->PchHdaIDispLinkFrequency = config->pch_hda_idisp_link_frequency; m_cfg->PchHdaIDispCodecDisconnect = !config->pch_hda_idisp_codec_enable; + m_cfg->PchHdaAudioLinkHdaEnable = config->pch_hda_audio_link_hda_enable; for (int i = 0; i < MAX_HD_AUDIO_SDI_LINKS; i++) m_cfg->PchHdaSdiEnable[i] = config->pch_hda_sdi_enable[i]; - /* - * All the PchHdaAudioLink{Hda|Dmic|Ssp|Sndw}Enable UPDs are used by FSP only to - * configure GPIO pads for audio. Mainboard is expected to perform all GPIO - * configuration in coreboot and hence these UPDs are set to 0 to skip FSP GPIO - * configuration for audio pads. - */ - m_cfg->PchHdaAudioLinkHdaEnable = 0; memset(m_cfg->PchHdaAudioLinkDmicEnable, 0, sizeof(m_cfg->PchHdaAudioLinkDmicEnable)); memset(m_cfg->PchHdaAudioLinkSspEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSspEnable)); memset(m_cfg->PchHdaAudioLinkSndwEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSndwEnable)); -- cgit v1.2.3