From 4ed30cae08ed48d0949a7833bacafd8391de390c Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 27 Oct 2022 15:44:54 +0530 Subject: soc/intel/meteorlake: Move P2SB PCI resource into P2SB device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch ensures the P2SB PCI device resource is getting reserved so that the resource allocator is not assigning this resource to any other PCI device during the PCI enumeration. BUG=b:254207628 TEST=Able to ensure on the Google/Rex device, the PCI enumeration is not assigning the P2SB BAR (0xE000_0000) to TBT Root Port3. Instead the 0xE000_0000 address is being assigned to the P2SB PCI device. Without this patch: [SPEW ]     PCI: 00:07.3 resource base e0000000 size c200000 align 20 gran 20 limit ec1fffff flags 60080202 index 20 [DEBUG]      GENERIC: 1.0 [DEBUG]      NONE [SPEW ]      NONE resource base e0000000 size c200000 align 12 gran 12 limit ec1fffff flags 40000200 index 10 With this patch: [SPEW ]     PCI: 00:07.3 resource base e1000000 size c200000 align 20 gran 20 limit ed1fffff flags 60080202 index 20 [DEBUG]      GENERIC: 1.0 [DEBUG]      NONE [SPEW ]      NONE resource base e1000000 size c200000 align 12 gran 12 limit ed1fffff flags 40000200 index 10 ...... [DEBUG]     PCI: 00:1f.1 [SPEW ]     PCI: 00:1f.1 resource base e0000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index 10 Signed-off-by: Subrata Banik Change-Id: Ib0789b442af23f6be81c666e284633ef342dffe0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68909 Tested-by: build bot (Jenkins) Reviewed-by: Ivy Jian Reviewed-by: Eric Lai Reviewed-by: Tarun Tuli --- src/soc/intel/meteorlake/chip.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/meteorlake/chip.c') diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index f6e1d24725..041b16d413 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -182,6 +182,9 @@ static void soc_enable(struct device *dev) else if (dev->path.type == DEVICE_PATH_PCI && dev->path.pci.devfn == PCI_DEVFN_PMC) dev->ops = &pmc_ops; + else if (dev->path.type == DEVICE_PATH_PCI && + dev->path.pci.devfn == PCI_DEVFN_P2SB) + dev->ops = &soc_p2sb_ops; else if (dev->path.type == DEVICE_PATH_PCI && dev->path.pci.devfn == PCI_DEVFN_IOE_P2SB) dev->ops = &ioe_p2sb_ops; -- cgit v1.2.3