From ecf2b42e73d955737f9af7adf2bfcf9bcf29f41f Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 31 Aug 2023 10:06:00 -0500 Subject: soc/intel/{adl,jsl,mtl,tgl}: Add ACPI name for GNA device Add SA_DEV_SLOT_GNA definition to SoCs missing it, so the name resolves properly. TEST=tested with rest of patch train Change-Id: I31c8b14e5083fc8e212a4e32330125fa72696c73 Signed-off-by: Matt DeVillier Signed-off-by: CoolStar Reviewed-on: https://review.coreboot.org/c/coreboot/+/77576 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/soc/intel/jasperlake/chip.c | 1 + src/soc/intel/jasperlake/include/soc/pci_devs.h | 10 +++++++--- 2 files changed, 8 insertions(+), 3 deletions(-) (limited to 'src/soc/intel/jasperlake') diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c index 567dccb6c9..8cf982a5e3 100644 --- a/src/soc/intel/jasperlake/chip.c +++ b/src/soc/intel/jasperlake/chip.c @@ -67,6 +67,7 @@ const char *soc_acpi_name(const struct device *dev) case SA_DEVFN_ROOT: return "MCHC"; case SA_DEVFN_IPU: return "IPU0"; case PCH_DEVFN_ISH: return "ISHB"; + case SA_DEVFN_GNA: return "GNA"; case PCH_DEVFN_XHCI: return "XHCI"; case PCH_DEVFN_I2C0: return "I2C0"; case PCH_DEVFN_I2C1: return "I2C1"; diff --git a/src/soc/intel/jasperlake/include/soc/pci_devs.h b/src/soc/intel/jasperlake/include/soc/pci_devs.h index f6c4fc545b..e3276458bf 100644 --- a/src/soc/intel/jasperlake/include/soc/pci_devs.h +++ b/src/soc/intel/jasperlake/include/soc/pci_devs.h @@ -30,6 +30,10 @@ #define SA_DEVFN_DPTF PCI_DEVFN(SA_DEV_SLOT_DPTF, 0) #define SA_DEV_DPTF PCI_DEV(0, SA_DEV_SLOT_DPTF, 0) +#define SA_DEV_SLOT_IPU 0x05 +#define SA_DEVFN_IPU PCI_DEVFN(SA_DEV_SLOT_IPU, 0) +#define SA_DEV_IPU PCI_DEV(0, SA_DEV_SLOT_IPU, 0) + #define SA_DEV_SLOT_TBT 0x07 #define SA_DEVFN_TBT0 PCI_DEVFN(SA_DEV_SLOT_TBT, 0) #define SA_DEVFN_TBT1 PCI_DEVFN(SA_DEV_SLOT_TBT, 1) @@ -40,9 +44,9 @@ #define SA_DEV_TBT2 PCI_DEV(0, SA_DEV_SLOT_TBT, 2) #define SA_DEV_TBT3 PCI_DEV(0, SA_DEV_SLOT_TBT, 3) -#define SA_DEV_SLOT_IPU 0x05 -#define SA_DEVFN_IPU PCI_DEVFN(SA_DEV_SLOT_IPU, 0) -#define SA_DEV_IPU PCI_DEV(0, SA_DEV_SLOT_IPU, 0) +#define SA_DEV_SLOT_GNA 0x08 +#define SA_DEVFN_GNA PCI_DEVFN(SA_DEV_SLOT_GNA, 0) +#define SA_DEV_GNA PCI_DEV(0, SA_DEV_SLOT_GNA, 0) /* PCH Devices */ #define PCH_DEV_SLOT_SIO0 0x10 -- cgit v1.2.3