From d2fadda52a5df72dbaedeed5c7f1c94bedbfd898 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Mon, 27 Sep 2021 19:26:20 +0200 Subject: soc/intel: replace dt option PmTimerDisabled by Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the dt option `PmTimerDisabled` with use of the Kconfig option `USE_PM_ACPI_TIMER` for enabling/disabling the PM Timer. A default value representing the prior devicetree value was added to the boards system76/{lemp10,galp5,darp7}, so this change will not alter behaviour. Change-Id: If1811c6b98847b22272acfa35ca44f4fbca68947 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/58016 Tested-by: build bot (Jenkins) Reviewed-by: Lance Zhao Reviewed-by: Tim Wawrzynczak Reviewed-by: Tim Crawford Reviewed-by: Nico Huber --- src/soc/intel/jasperlake/Kconfig | 1 + src/soc/intel/jasperlake/chip.h | 2 -- src/soc/intel/jasperlake/finalize.c | 12 +++--------- 3 files changed, 4 insertions(+), 11 deletions(-) (limited to 'src/soc/intel/jasperlake') diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 3f9014cbac..690df0cf2d 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -32,6 +32,7 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_2 + select PM_ACPI_TIMER_OPTIONAL select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_LOW_POWER_MODE_PROGRAM select SOC_INTEL_COMMON diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index 3d680d3b7e..87a98fb351 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -152,8 +152,6 @@ struct soc_intel_jasperlake_config { /* Enable C6 DRAM */ uint8_t enable_c6dram; - uint8_t PmTimerDisabled; - /* * SerialIO device mode selection: * PchSerialIoDisabled, diff --git a/src/soc/intel/jasperlake/finalize.c b/src/soc/intel/jasperlake/finalize.c index a60e71916e..9aef9eb5d9 100644 --- a/src/soc/intel/jasperlake/finalize.c +++ b/src/soc/intel/jasperlake/finalize.c @@ -44,7 +44,7 @@ static void pch_finalize(void) { uint32_t reg32; uint8_t *pmcbase; - config_t *config; + config_t *config = config_of_soc(); /* TCO Lock down */ tco_lockdown(); @@ -52,18 +52,12 @@ static void pch_finalize(void) /* TODO: Add Thermal Configuration */ /* - * Disable ACPI PM timer based on dt policy + * Disable ACPI PM timer based on Kconfig * * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. * Disabling ACPI PM timer also switches off TCO - * - * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is - * just required to get to chip config. PCH_DEV_PMC is hidden by this - * point and hence removed from the root bus. pcidev_path_on_root thus - * returns NULL for PCH_DEV_PMC device. */ - config = config_of_soc(); - if (config->PmTimerDisabled) + if (!CONFIG(USE_PM_ACPI_TIMER)) pmc_disable_acpi_timer(); pmcbase = pmc_mmio_regs(); -- cgit v1.2.3