From a64b4f454894988a9c043d53d00b493852f261a3 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Thu, 15 Oct 2020 00:36:29 +0200 Subject: mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The dt option `speed_shift_enable` is obsolete now. Drop it. Change-Id: I5ac3b8efe37aedd442962234478fcdce675bf105 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/46462 Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer Reviewed-by: Frans Hendriks --- src/soc/intel/jasperlake/chip.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/intel/jasperlake') diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index 4410de9310..5e9053063b 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -149,8 +149,6 @@ struct soc_intel_jasperlake_config { /* HeciEnabled decides the state of Heci1 at end of boot * Setting to 0 (default) disables Heci1 and hides the device from OS */ uint8_t HeciEnabled; - /* Intel Speed Shift Technology */ - uint8_t speed_shift_enable; /* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */ uint8_t eist_enable; -- cgit v1.2.3