From 2b594816eaa4629e549fcd2ca06f4395806ec78b Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 22 Apr 2022 19:48:40 +0530 Subject: soc/intel/cmn/lockdown: Perform SA lockdown configuration `sa_lockdown_cfg` function ensures locking the PAM register hence, skip dedicated calling into `sa_lock_pam()` from the SoC `finalize.c` file. Dropped sa_lock_pam() call from ADL/CNL/EHL/JSL and TGL. Additionally, this patch enforces SA lockdown configuration for SKL and ICL as well. BUG=b:211954778 TEST=Able to build google/brya with these changes. > localhost ~ # lspci -xxx | less 00:00.0 Host bridge: Device 8086:4601 (rev 04) Bit 0 for all PAM registers a.k.a, PAMx_0_0_0_PCI.LOCK bit is set (meaning locked). Signed-off-by: Subrata Banik Change-Id: Ibd464d2507393ed0c746eb1fbd10e36092ed5599 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63518 Tested-by: build bot (Jenkins) Reviewed-by: Lean Sheng Tan Reviewed-by: Eric Lai --- src/soc/intel/jasperlake/finalize.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'src/soc/intel/jasperlake') diff --git a/src/soc/intel/jasperlake/finalize.c b/src/soc/intel/jasperlake/finalize.c index 3b0d49742e..5665d75340 100644 --- a/src/soc/intel/jasperlake/finalize.c +++ b/src/soc/intel/jasperlake/finalize.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include @@ -71,19 +70,12 @@ static void pch_finalize(void) pmc_clear_pmcon_sts(); } -static void sa_finalize(void) -{ - if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) - sa_lock_pam(); -} - static void soc_finalize(void *unused) { printk(BIOS_DEBUG, "Finalizing chipset.\n"); pch_finalize(); apm_control(APM_CNT_FINALIZE); - sa_finalize(); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); -- cgit v1.2.3