From 56ab8e2aae25efc839daeb56d5922e66d2680aec Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 7 Jan 2022 13:40:19 +0000 Subject: =?UTF-8?q?soc/intel/common/cpu:=20Use=20SoC=20overrides=20to=20ge?= =?UTF-8?q?t=20CPU=20privilege=C2=A0level?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch implements a SoC overrides to check CPU privilege level as the MSR is not consistent across platforms. For example: On APL/GLK/DNV, it's MSR 0x120 and CNL onwards it's MSR 0x151. BUG=b:211573253, b:211950520 Signed-off-by: Subrata Banik Change-Id: I515f0a3548bc5d6250e30f963d46f28f3c1b90b3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60900 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/jasperlake/include/soc/msr.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/jasperlake/include') diff --git a/src/soc/intel/jasperlake/include/soc/msr.h b/src/soc/intel/jasperlake/include/soc/msr.h index 954fce0a82..5bdbf92e8b 100644 --- a/src/soc/intel/jasperlake/include/soc/msr.h +++ b/src/soc/intel/jasperlake/include/soc/msr.h @@ -5,6 +5,8 @@ #include -#define MSR_VR_MISC_CONFIG2 0x636 +#define MSR_BIOS_DONE 0x151 +#define ENABLE_IA_UNTRUSTED (1 << 0) +#define MSR_VR_MISC_CONFIG2 0x636 #endif -- cgit v1.2.3