From c796a8f238f70a09828d5c40c23c05650803cb3c Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 1 Jul 2019 10:21:11 +0530 Subject: soc/intel/icelake: Disable HDA based on devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I28c2beca4bc26ddb896e68886571ebdc82276b48 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/33933 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel --- src/soc/intel/icelake/romstage/fsp_params.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/icelake') diff --git a/src/soc/intel/icelake/romstage/fsp_params.c b/src/soc/intel/icelake/romstage/fsp_params.c index 3c49feeccc..fa6f9392a4 100644 --- a/src/soc/intel/icelake/romstage/fsp_params.c +++ b/src/soc/intel/icelake/romstage/fsp_params.c @@ -25,7 +25,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_icelake_config *config) { unsigned int i; - const struct device *dev = pcidev_on_root(0, 0); + const struct device *dev; uint32_t mask = 0; /* Set IGD stolen size to 60MB. */ @@ -36,7 +36,9 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->UserBd = BOARD_TYPE_ULT_ULX; m_cfg->RMT = config->RMT; m_cfg->SkipMbpHob = 1; + /* If Audio Codec is enabled, enable FSP UPD */ + dev = pcidev_on_root(0x1f, 3); if (!dev) m_cfg->PchHdaEnable = 0; else -- cgit v1.2.3