From df29d23ee3f36d3d6a5fa0fde46beeb67554a8da Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Fri, 5 Jul 2019 16:00:38 +0530
Subject: soc/intel/icelake: Refer to soc/soc_chip.h rather than chip.h

Change-Id: I9e3b5126173e7cec8f2809a38b92c82c9ed5327d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34085
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/icelake/romstage/romstage.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

(limited to 'src/soc/intel/icelake/romstage/romstage.c')

diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 514e5e8925..65e65cc80e 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -27,11 +27,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/romstage.h>
+#include <soc/soc_chip.h>
 #include <string.h>
 #include <timestamp.h>
 
-#include "../chip.h"
-
 #define FSP_SMBIOS_MEMORY_INFO_GUID	\
 {	\
 	0xd4, 0x71, 0x20, 0x9b, 0x54, 0xb0, 0x0c, 0x4e,	\
-- 
cgit v1.2.3