From 1b1a26acdc814d0478bb5fda0b6664076a60fdf1 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 5 Nov 2019 16:54:58 +0530 Subject: soc/intel/icelake: Refactor pch_early_init() code This patch keeps required pch_early_init() function like ABASE programming, GPE and RTC init into bootblock and moves remaining functions like TCO configuration and SMBUS init into romstage/pch.c in order to maintain only required chipset programming for bootblock and verstage. TEST=Able to build and boot ICL DE system. Change-Id: I4f0914242c3215f6bf76e41c468f544361a740d8 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/36627 Reviewed-by: Aamir Bohra Reviewed-by: Furquan Shaikh Reviewed-by: Maulik V Vaghela Tested-by: build bot (Jenkins) --- src/soc/intel/icelake/romstage/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/icelake/romstage/Makefile.inc') diff --git a/src/soc/intel/icelake/romstage/Makefile.inc b/src/soc/intel/icelake/romstage/Makefile.inc index baa4d46e55..b42f3f4b7a 100644 --- a/src/soc/intel/icelake/romstage/Makefile.inc +++ b/src/soc/intel/icelake/romstage/Makefile.inc @@ -16,4 +16,5 @@ romstage-y += fsp_params.c romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c +romstage-y += pch.c romstage-y += systemagent.c -- cgit v1.2.3