From ad6e3c847f4b11a7913db501cdc10339c9fd5ea2 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Tue, 17 Jan 2023 12:11:00 +0100 Subject: tree: Drop Intel Ice Lake support Intel Ice Lake is unmaintained and the only user of this platform ever was the Intel CRB (Customer Reference Board). As it looks like, it was never ready for production as only engineering sample CPUIDs are supported. As announced in the 4.19 release notes, remove support for Intel Icelake code and move any maintenance on the 4.19 branch. This affects the following components and their related code: * Intel Ice Lake SoC * Intel Ice Lake CRB mainboard * Documentation Change-Id: Ia796d4dc217bbcc3bbd9522809ccff5a46938094 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/72008 Reviewed-by: Subrata Banik Reviewed-by: Elyes Haouas Tested-by: build bot (Jenkins) --- src/soc/intel/icelake/lockdown.c | 62 ---------------------------------------- 1 file changed, 62 deletions(-) delete mode 100644 src/soc/intel/icelake/lockdown.c (limited to 'src/soc/intel/icelake/lockdown.c') diff --git a/src/soc/intel/icelake/lockdown.c b/src/soc/intel/icelake/lockdown.c deleted file mode 100644 index 3205c7f303..0000000000 --- a/src/soc/intel/icelake/lockdown.c +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include -#include - -static void pmc_lock_pmsync(void) -{ - uint8_t *pmcbase; - uint32_t pmsyncreg; - - pmcbase = pmc_mmio_regs(); - - pmsyncreg = read32(pmcbase + PMSYNC_TPR_CFG); - pmsyncreg |= PCH2CPU_TPR_CFG_LOCK; - write32(pmcbase + PMSYNC_TPR_CFG, pmsyncreg); -} - -static void pmc_lock_abase(void) -{ - uint8_t *pmcbase; - uint32_t reg32; - - pmcbase = pmc_mmio_regs(); - - reg32 = read32(pmcbase + GEN_PMCON_B); - reg32 |= (SLP_STR_POL_LOCK | ACPI_BASE_LOCK); - write32(pmcbase + GEN_PMCON_B, reg32); -} - -static void pmc_lock_smi(void) -{ - uint8_t *pmcbase; - uint8_t reg8; - - pmcbase = pmc_mmio_regs(); - - reg8 = read8(pmcbase + GEN_PMCON_B); - reg8 |= SMI_LOCK; - write8(pmcbase + GEN_PMCON_B, reg8); -} - -static void pmc_lockdown_cfg(int chipset_lockdown) -{ - /* PMSYNC */ - pmc_lock_pmsync(); - /* Lock down ABASE and sleep stretching policy */ - pmc_lock_abase(); - /* Make sure payload/OS can't trigger global reset */ - pmc_global_reset_disable_and_lock(); - - if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) - pmc_lock_smi(); -} - -void soc_lockdown_config(int chipset_lockdown) -{ - /* PMC lock down configuration */ - pmc_lockdown_cfg(chipset_lockdown); -} -- cgit v1.2.3