From 646109a4ea12b28ec5c5cd89c4066bb37835605f Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 25 Feb 2020 10:29:15 +0530 Subject: soc/intel/{cnl,icl}: Avoid static 8254 clock gating on S3 resume This patch makes all legacy 8254 FSP UPDs (Enable8254ClockGating and Enable8254ClockGatingOnS3) depend on CONFIG_USE_LEGACY_8254_TIMER to avoid discrepancy between S0 and S3 resume flow. TEST=Able to boot to TianoCore without any hangs and errors, also verified S3 resume path doesn't clock gate 8254 timer using FSP-S UPD. Change-Id: Id6fe74a51537abbb9ff48db925e37a64e5b21f78 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/39110 Reviewed-by: Duncan Laurie Reviewed-by: Wonkyu Kim Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/icelake/fsp_params.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/icelake/fsp_params.c') diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index 7514be107d..334fac8766 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -140,7 +140,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Legacy 8254 timer support */ params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER; - params->Enable8254ClockGatingOnS3 = 1; + params->Enable8254ClockGatingOnS3 = !CONFIG_USE_LEGACY_8254_TIMER; /* S0ix */ params->PchPmSlpS0Enable = config->s0ix_enable; -- cgit v1.2.3