From e1559eb84f26ab2476512bf999282ccf94c7176c Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 13 Jul 2019 09:44:43 +0300 Subject: soc/intel: Fix chip_info for PCH_DEV_PMC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since PCH_DEVFN_PMC device is a PCI device that may be hidden from enumeration, use SA_DEVFN_ROOT instead to locate the SOC configuration. Change-Id: I4b5195827fb32ec1dbd0bd6c9e243f4f9a4775ca Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34327 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie Reviewed-by: Furquan Shaikh --- src/soc/intel/icelake/finalize.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/soc/intel/icelake/finalize.c') diff --git a/src/soc/intel/icelake/finalize.c b/src/soc/intel/icelake/finalize.c index e035c958df..c969f3b6e8 100644 --- a/src/soc/intel/icelake/finalize.c +++ b/src/soc/intel/icelake/finalize.c @@ -54,7 +54,6 @@ static void pch_handle_sideband(config_t *config) static void pch_finalize(void) { - struct device *dev; uint32_t reg32; uint8_t *pmcbase; config_t *config; @@ -74,8 +73,7 @@ static void pch_finalize(void) * point and hence removed from the root bus. pcidev_path_on_root thus * returns NULL for PCH_DEV_PMC device. */ - dev = SA_DEV_ROOT; - config = dev->chip_info; + config = config_of_path(SA_DEVFN_ROOT); pmcbase = pmc_mmio_regs(); if (config->PmTimerDisabled) { reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL); -- cgit v1.2.3