From 7bc4dc5648c6ff37a847e99d7acee11e3e72a79d Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 17 May 2018 18:40:32 +0530 Subject: soc/intel/common/block: Move tco common functions into block/smbus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch cleans soc/intel/{apl/cnl/icl/skl} by moving common soc code into common/block/smbus. BUG=b:78109109 BRANCH=NONE TEST=Build and boot KBL/CNL/APL/ICL platform. Change-Id: I34b33922cafee9f31702587e0f9c03b64f0781b8 Signed-off-by: Subrata Banik Signed-off-by: Maulik V Vaghela Reviewed-on: https://review.coreboot.org/c/26166 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/soc/intel/icelake/bootblock/pch.c | 35 ++--------------------------------- 1 file changed, 2 insertions(+), 33 deletions(-) (limited to 'src/soc/intel/icelake/bootblock') diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index 28d669aa2c..2afb358726 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -49,9 +50,6 @@ #define PCR_DMI_ACPIBDID 0x27B8 #define PCR_DMI_PMBASEA 0x27AC #define PCR_DMI_PMBASEC 0x27B0 -#define PCR_DMI_TCOBASE 0x2778 -/* Enable TCO I/O range decode. */ -#define TCOEN (1 << 1) #define PCR_DMI_LPCIOD 0x2770 #define PCR_DMI_LPCIOE 0x2774 @@ -119,35 +117,6 @@ static void soc_config_acpibase(void) } } -static void soc_config_tco(void) -{ - uint32_t reg32; - uint16_t tcobase; - uint16_t tcocnt; - - /* Disable TCO in SMBUS Device first before changing Base Address */ - reg32 = pci_read_config32(PCH_DEV_SMBUS, TCOCTL); - reg32 &= ~TCO_BASE_EN; - pci_write_config32(PCH_DEV_SMBUS, TCOCTL, reg32); - - /* Program TCO Base */ - tcobase = TCO_BASE_ADDRESS; - pci_write_config32(PCH_DEV_SMBUS, TCOBASE, tcobase); - - /* Enable TCO in SMBUS */ - pci_write_config32(PCH_DEV_SMBUS, TCOCTL, reg32 | TCO_BASE_EN); - - /* - * Program "TCO Base Address" PCR[DMI] + 2778h[15:5, 1] - */ - pcr_write32(PID_DMI, PCR_DMI_TCOBASE, tcobase | TCOEN); - - /* Program TCO timer halt */ - tcocnt = inw(tcobase + TCO1_CNT); - tcocnt |= TCO_TMR_HLT; - outw(tcocnt, tcobase + TCO1_CNT); -} - static int pch_check_decode_enable(void) { uint32_t dmi_control; @@ -194,7 +163,7 @@ void pch_early_init(void) soc_config_acpibase(); /* Programming TCO_BASE_ADDRESS and TCO Timer Halt */ - soc_config_tco(); + tco_configure(); /* Program SMBUS_BASE_ADDRESS and Enable it */ smbus_common_init(); -- cgit v1.2.3